Technical Field
This disclosure relates generally to computer processing and more specifically to a cache for patterns of instructions.
Description of the Related Art
Computer processors are used in many applications where power consumption is an important design consideration, including mobile phones, tablet devices, server assemblies, etc. Some of the power consumed by a processor is typically used to maintain recent instructions in an instruction cache and predict the direction of branches in program code. In order to reduce power consumption for these tasks, modern processors often utilize a loop buffer to store loops of program instructions that are executed multiple times. Such loops may be fetched and executed from the loop buffer without utilizing other parts of a processing pipeline's front end, thus reducing power consumption. Exemplary embodiments of loop buffers are described in U.S. Patent Application Publication Nos. 2013/0339700 and 2013/0339699. However, current loop buffers are not capable of storing more complex patterns of execution. Examples of more complex patterns of execution include patterns with multiple backward branches and patterns with conditional branches whose behavior changes in different iterations of the pattern.